IP Service

联暻通过与联电集团(UMC)内部自主研发或与外部厂商合作的方式,为客户提供众多可携式与成本最佳化的基础系统单芯片设计区块及更复杂的IP。与一般的集成电路设计服务企业相比,我们在设计中采用了联电集团自主知识产权的架构和技术,因此设计的产品运行速度更快、面积更小且单位功耗更低。联电集团提供的IP均通过可靠性、可重复使用性与成本最佳化测试,并与联电工艺技术相切合。联暻将客户的设计方案和联电先进工艺技术设计执行的综合免费设计单元数据陆相融合,帮助客户提高设计水准。

Analog & Mixed Signal IP
IP Type Description Datasheet
ADC
10-bit Pipeline 80MHz
10-bit SAR 400KHz
DAC
10-bit 400KHz
10-bit Dual DAC, 300MHz
LDO
LDO 1.2V output and 200mA driving
OSC
Ring Oscillator with external resister
1MHz RC Oscillator
PLL
12-24MHz Input, Output 200-800MHz Output Clock Synthesizer Programmable PLL
POR
Power On Reset
Flash
SST/SONOS Flash macro
OTP
OTP
eFuse
e-Fuse
USB1.1 PHY
Crystal-less USB1.1 PHY
USB2.0 PHY
USB2.0 Device PHY
Library IP
IP Type Description Datasheet
Multi-Bit Flip-Fllop kit
Power and area reduction kit
IO
Special IO
Digital IP
IP Type Description Datasheet
I2C
I2C Master/Slave Controller, APB Compliant
RTC
RTC Controller, APB Compliant
SPI
SPI Master Controller, APB Compliant
UART
UART Controller, APB Compliant

 

IP 目录

藉由提供便利的管道获取外部厂商的IP区块以进一步整合至客户设计中,联电协助设计公司与系统开发厂商克服系统单芯片与上市时间的障碍。
详情请联络你的联暻业务经理或直接登入MyUMC服务。

Note:

The IP in this website includes IP from specific vendors. IP from specific vendors are pursuant to the terms and solely with the rights offered by those vendors. UMC makes no warranty, express or implied, with regard to third party IP, and expressly disclaims any warranty of non-infringement, merchantability, or suitability for any particular purpose.
Free Libraries may not be available to all parties. Companies wishing to access these libraries may contact the library providers to negotiate directly.

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